Online Access Free 1z0-489 Exam Questions

Which two statements are true according to Enterprise Installation Stan (EIS) regarding boot disk layout?

• A.Under ZFS, the boot devices/disks are placed in a ZFS poof (called rpool by default), and all datasets (consisting of file systems and volumes) are allocated flexibly from that pool.
• B.For UFS-based root file systems, EIS recommends that H/W RAID 0 be used to mirror the bootdisk wherever it is available.
• C.For ZFS-based root file systems, EIS recommends you do not use H/W RAID 1 unless sufficient disks are available for ZFS to mirror itself.
• D.For ZFS-based root file systems, EIS recommends you do not use H/W RAID 0 unless sufficientdisks are available for ZFS to mirror itself.

Your customer says that they have some specific requirements they would like to address in the boot disk layout for their system. In which Enterprise Installation Standars (EIS) document would you note this?

• A.Project Schedule
• B.Operational Handover Document
• C.Test Procedures Plan
• D.Site Audit Report
• E.Installation Configuration Plan

Which three statements are correct about installing DIMMS?

• A.If a DIMM slot LED is lit, press the Fault Remind button to turn off the LED.
• B.Be sure that you are properly grounded before inserting the DIMM(s) in the socket(s).
• C.When you press the DIMM Fault Remind button, the slot for a faulty DIMM is lit.
• D.If a DIMM slot LED is lit, the fault is cleared only by the reset command In JLOM.
• E.When replacing a faulty CMU, you do not need to keep DIMMs in the same locations on thereplacement CMU, because the server has an intelligent load-balance feature.

Which three statements are true about PCIecard population on the SPARC M5-32 server?

• A.The order of PCIe card portion is the same in the OCU with 2x or 4x CMUs.
• B.In a 4x CMU environment, PCIe slot 3 shares the same PCIe switch with the EMS (Base I/O board); the same is true for PCIe slots 6,11, and 14.
• C.In 2x CMU environments, PICe slots 3 and 4 share the same PCIe switch with the EMS I/O board); the same is true for PICe slots 5 and 6, PCIe slots 11 and 12, and PCI slots 13 and 14.
• D.Each DCU has two sets of PCIe slots. PCIe slots 1-8 are connected to IOB0, and PCIe slots 916 are connected to IOB1.
• E.In the DCU with 2x CMUs (in slots 0 and 3), you may only populated card to PCIe slots 1-8.

Which three statements are correct descriptions of SPARC M5-32 server design? (DCU = Domain Configuration Unit, CMU = CPU Memory Board Unit, IOU = I/O Switch Board)

• A.In a DCU that has 2x CMU, installing in slots 0 and 1 is invalid.
• B.In a DCU that has 2x CMU, you need to install in position CMUO and CMU3 so that the root complexes of the two CPUs on CMUO can connect to IOBO and link to PCIe slots 1-8; and CMU3 can connect to IOB1 and link to PCIe slot9-l6.
• C.In a DCU that has 4x CMU, CMUO and CMU1 are connected to IOBO, and also linked to PCIe 1-8,but root complexes can work as fail over partners for high availability (the same applies to cmiw and CMU3 that connect to IOB1).
• D.In a DCU that has 2x CMU, each CMU has 2x CPU, and each CPU has two PCIe root complexes; so you can access only eight PCIe slots (that is, 2x2x2) in that IOU.
• E.EMS modules also need a PCIe root complex to control.